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Alu with end-around carry derived from auxiliary unit

閱讀：556發(fā)布：2021-10-23

專利匯可以提供Alu with end-around carry derived from auxiliary unit專利檢索，專利查詢，專利分析的服務(wù)。并且An arithmetic logic unit which requires an end-around carry in its operation obtains this carry from an auxiliary arithmetic logic unit which is connected in parallel with it. Since the endaround carry does not appear in a closed loop, oscillations which might otherwise occur in the solution because of the irregular appearance of input data are minimized.，下面是Alu with end-around carry derived from auxiliary unit專利的具體信息內(nèi)容。

1. In a computer, the combination of a main arithmetic logic unit which performs addition and subtraction by a complementary process, said arithmetic logic unit having a pair of input lines, a carry-out location at which the end-around carry signal appears a carry-in location at which the end-around carry signal is applied, said carry-out and carry-in locations being disconnected; an auxiliary arithmetic logic unit which also performs addition and subtraction by a complementary process, said auxiliary arithmetic logic unit having a pair of input lines, a carry-out location at which the end-around carry signal appears and a carry-in location at which the end-around carry signal is applied, said last mentioned carry-out and carry-in locations also being disconnected; means for connecting the input lines of said main and auxiliary arithmetic logic units in parallel; and means for connecting the carry-out location of said auxiliary arithmetic logic unit to the carry-in location of said main arithmetic logic unit whereby the end-around carry signal produced by said auxiliary arithmetic logic unit is utilized in the operation of said main arithmetic logic unit.
2. In a computer, the combination of a main arithmetic logic unit which performs addition and substraction by a complementary process, said arithmetic logic unit having a pair of input lines, a carry-out terminal at which the end-around carry signal appears and a carry-in terminal to which the end-around carry signal is applied, said arithmetic logic unit being constructed such that its carry-out and carry-in terminals are not interconnected; an auxiliary arithmetic logic unit which performs addition and subtraction by a complementary process, said auxiliary arithmetic logic unit having a pair of input lines, a carry-out terminal at which the end-around carry signal appears and a carry-in terminal to which the end-around carry signal is applied, said auxiliary arithmetic logic unit being constructed such that its carry-out and carry-in terminals are not interconnected; means for connecting the input lines of said main and auxiliary arithmetic logic units in parallel so that both units concurrently process the same numerical quantities; and means for interconnecting the carry-out terminal of said auxiliary arithmetic logic unit to the carry-in terminal of said main arithmetic logic unit whereby the end-around carry signal utilized in said main arithmetic logic unit is obtained from the auxiliary arithmetic logic unit.
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