Inter-bus transfer system
專利匯可以提供Inter-bus transfer system專利檢索，專利查詢，專利分析的服務。并且PURPOSE: To process the requests produced from a serial controller asynchronously with each other at a high speed with no waiting by setting a register file between the serial controller and an I/O function block.
CONSTITUTION: A 2-bit transfer direction control signal is sent to a signal line 206 from a selection control logic circuit 205 via the control signals sent to the signal lines 201-204 from the outside. In the case the chip selection signal (CS) put on the line 201 is set active by a microprocessor, a register file 207 performs the transfer of data between a port A and a main bus via the read/ write signal put on the line 202. Then the file 207 performs the transfer of data to a serial controller via the ports B and C in the case only when the CS signal is inactive. Thus it is possible to process the requests produced from the serial controller asynchronously with each other at a high speed and with no waiting.
COPYRIGHT: (C)1990,JPO&Japio，下面是Inter-bus transfer system專利的具體信息內(nèi)容。
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